The rapid scaling of CMOS technology and the push for higher levels of integration on a single chip have led to the necessity of placing entire systems on a chip (SOC). Wireless systems, in particular, rely on increased integration of the various components for performance enhancement. However, one of the most significant problems to the realization of an SOC is the parasitic interactions (e.g. electrical noise or interference) between large complex digital circuits and highly sensitive analog circuits. Performance of a wireless system is highly dependent on the ability to receive low-level signals while eliminating interfering signals. Substrate noise can be a significant interferer.
The noise coupling between the analog and digital components is a problem for mixed-signal integration. Three mechanisms govern substrate noise in integrated circuits. The first is the injection mechanism, whereby relatively large transient currents induced during digital switching work in tandem with circuit parasitics to induce noise on the power and ground lines as well as in the substrate. The second mechanism is propagation, for which noise travels from a noise generating element of the SOC through the common substrate to corrupt another element of the SOC, such as sensitive analog circuits. The third mechanism is reception, which explains how the noise couples to sensitive nodes. This occurs through source/drain capacitive coupling, power and ground bounce, and the backgate effect.
By breaking the resistive connection that is present as a result of the shared substrate, substrate noise can be significantly reduced. Three-dimensional integration is a technology whereby systems can be fabricated on separate wafers and subsequently bonded to form a single chip. Particularly noisy systems could be fabricated on a separate layer from more sensitive circuits thereby eliminating any noise propagation in the substrate.
The noise problem is mitigated in three-dimensional semiconductor structures; however, the problem is not completely solved. The three-dimensional semiconductor structure includes a number of individual integrated circuit structures which are stacked and bonded together. In the three-dimensional semiconductor structure, electrical noise or interference created by one device layer can be induced in the substrate of the adjacent layer due to the proximity of high-speed switching lines.
Therefore, it would be desirable to provide a structure that provides substantial shielding to electrical noise or interference communicated between adjacently bonded device layers of the three-dimensional semiconductor structure.